The Free Chip Blueprint Nobody Can Own: Inside RISC-V's Quiet Takeover

Most people have never heard of RISC-V, yet there's a decent chance a RISC-V core is already running somewhere near you — inside a hard drive controller, a wearable's sensor hub, or a slice of an Nvidia GPU. It's not a company, a product, or even a chip. It's a free, open blueprint for how a processor's instructions should be organized — and it's quietly rewriting the rules of an industry that has run on expensive, proprietary licenses for decades.

It Started as a Summer Project

RISC-V traces back to 2010, when UC Berkeley professor Krste Asanović and graduate students Yunsup Lee and Andrew Waterman set out to design a new instruction set architecture (ISA) — the basic vocabulary of commands a processor understands — for their research. The problem they ran into was mundane but telling: licensing Arm or x86 wouldn't let them freely customize the core or publish their results for other researchers to build on. So they designed their own.

The name nods to lineage, not marketing. Berkeley's Dave Patterson — a co-inventor of the original RISC concept in the 1980s — had already put his name on a string of research chips at the university; RISC-V is literally the fifth generation of that line. What began as what one Berkeley account describes as a short summer project outgrew the lab fast. The ISA specification was published openly in 2011, and by the time the nonprofit RISC-V International took over stewardship, the architecture had already started showing up in silicon well outside academia. The foundation's own figures claim over 10 billion RISC-V cores had shipped by the end of 2022 — though as a number self-reported by the body promoting the standard, it's worth treating as a rough industry estimate rather than an audited count.

Why "Open" Actually Matters Here

Arm, the UK-based architecture behind nearly every smartphone chip on Earth, makes its money by licensing its ISA and designs to chipmakers — Qualcomm, Apple, Samsung, MediaTek and others all pay for the privilege, and all build on a blueprint they don't own. x86, the architecture behind most PCs and servers, is even more tightly held, controlled essentially by Intel and AMD.

RISC-V flips that model. The instruction set itself is free and royalty-free — anyone can design a chip around it without paying a licensing fee or asking permission. Companies can still build proprietary, closed chips on top of it (and most do), but the underlying architecture belongs to no single corporation and can't be revoked. For a startup, a university lab, or a national chip program, that removes a cost and a dependency that has shaped the semiconductor industry since its earliest days.

That's also exactly why RISC-V has become a bigger geopolitical story than a technical one in recent years.

Switzerland, Export Controls, and a Very Deliberate Move

In 2020, RISC-V International relocated its headquarters from the United States to Switzerland. The foundation's stated reason was to insulate its open-collaboration model from political and trade disruption, and it has maintained that the move didn't circumvent any U.S. export restriction that existed at the time. But the subtext wasn't lost on Washington: Alibaba and Huawei are both paying members of the foundation, and lawmakers including Senator Tom Cotton and Representative Mike Gallagher publicly accused the move of helping Chinese firms work around future U.S. export controls.

Research from Georgetown's Center for Security and Emerging Technology (CSET) has since argued that controlling RISC-V the way the U.S. controls, say, advanced GPU exports is genuinely difficult — the foundation sits outside U.S. jurisdiction, and Washington can't block the publication of an open standard or Chinese firms' participation in writing it. CSET's conclusion was that RISC-V doesn't threaten existing chip-export controls yet, since those controls target specialized AI silicon that mostly runs on proprietary architectures — but that could change if general-purpose CPU exports ever come under similar restriction.

That dynamic is part of why RISC-V has become attractive to countries and companies trying to reduce dependency on any single foreign licensor — a consideration very much alive in the Gulf, where the UAE's broader chip strategy has centered on securing access to advanced U.S.-made processors through partners like G42, rather than any public RISC-V-specific program so far.

Who's Actually Shipping It

The hype can run ahead of the reality, so it's worth being specific about where RISC-V shows up today. Western Digital and Seagate have used RISC-V cores inside storage controllers for years — unglamorous but high-volume territory. Nvidia has quietly embedded RISC-V cores in its GPUs, including as the "GPU System Processor" that offloads driver-level housekeeping tasks. Qualcomm, which pays Arm for the processors in its Snapdragon smartphone chips, nonetheless uses RISC-V cores as microcontrollers elsewhere in its silicon, and has talked about RISC-V-based wearables built around Google's Wear OS.

Google has been building RISC-V support into Android itself, and backs the RISE Project — an industry group that includes Intel, Nvidia, Qualcomm and Samsung — aimed at speeding up the software ecosystem around the architecture. That support hasn't been a straight line: Google pulled RISC-V out of its mainline Android Common Kernel in 2024 after deciding the ecosystem wasn't ready for a single image spanning all vendors, while saying its longer-term commitment hadn't changed.

The Honest Limits

RISC-V is not about to replace Arm in your next phone or x86 in your next laptop. High-performance, general-purpose RISC-V chips capable of competing with flagship Arm or x86 silicon are still rare and mostly experimental — the architecture has made its real gains so far in microcontrollers, accelerators and embedded components, where raw peak performance matters less than cost and customizability. Software ecosystems, compiler maturity and the sheer inertia of decades of Arm and x86 tooling remain real obstacles.

What RISC-V has already proven is narrower but still significant: that an open, unowned instruction set can scale into real, shipping silicon at serious volume, and that the idea of a neutral architectural commons has enough strategic appeal that governments and giants alike are willing to build around it. Whether that eventually produces a RISC-V chip powerful enough to worry Arm's board is still an open question. That it has already changed how the industry — and policymakers — think about who gets to own the instructions a processor runs on is not.